16. Consensus

16.1 Consensus Protocol

Requirements:

Example

If c.decide(x) -> z, then all others would also have returned z and the linearisation point of $B$ would have been before $A$.

Consensus number

A class $C$ solves $n$-thread consensus if there exists a consensus protocol using any number of objects of class $C$ and any number of atomic registers.
Consensus number of $C$: largest $n$ such that $C$ solves $n$-thread consensus.

Atomic Registers

Atomic registers have consensus number $1$

Proof: Herlihy, Ch.5

• $\ge 1$ we can construct a protocol for $n=1$, just return $1$ always
• $\le 1$ → harder

COROLLARY

There is no wait-free implementation of $n$-thread consensus $n>1$ from read-write registers.

16. CAS

CAS Consensus number

Compare-and-Swap has inifinite consensus number.

Proof:

→ valid, consistent, wait-free
wait-free: only 4 operations → then done.

This is trivial.

• if we are first → CAS to r succeeds for only the first thread (while still has FIRST as value) and we swap in our value into the array.
• we have a shared array with proposed numbers.
  • take the value at the index of the winner

16.2 FIFO Queue

Wait-free FIFO

There is no wait-free implementation of a FIFO queue with atomic registers.

Proof We use a reduction from atomic-registers.

• we show we can build a FIFO Q from atomic registers
• show that FIFO solves consensus
• thus impossible to build one

Protocol implementation of consensus with FIFO Q

this works as follows:

• if one thread gets the red ball
• then the other gets the black ball
• winner (→ red ball) decides her own value
• loser finds the winners value in the array (it’s just the only other value in the array → doesn’t generalise to $n=3$)
  • because the threads write array before deq
    Whoever dequeues first wins → decides value.

16.3 Consensus Hierarchy

Wait-free FIFO queue

Wait-free FIFO queues have consensus number $2$.

Test-And-Set, getAndSet, getAndIncrement

Test-And-Set, getAndSet, getAndIncrement have consensus number $2$

→ wait-free FIFO queues, wait-free RMW operations and CAS cannot be implemented using atomic registers.

CAS

CAS has consensus number $\infty$