6.1 Registers

The register naming convention has a long history, explaining the confusing names.

The 8086 had only 16 bit registers, with some split into 8 and 8 (like accumulate, counter).

When we went to 32 bits, Intel just expanded the names, calling them “extended-accumulate” for example.

Note: the old names still work! they just refer to the lower bits!

The transition from 32-64 bits again extended, now with the “r”-prefix. It also added some new regs: r8-r15.

Here also, the old names still work!

64-bit32-bit16-bit8-bit (low / high)Role
%rax%eax%ax%al / %ahAccumulator: return value; implicit in mul/div
%rbx%ebx%bx%bl / %bhBase: general purpose, callee-saved
%rcx%ecx%cx%cl / %chCounter: rep/loop count, shift count in %cl; 4th arg
%rdx%edx%dx%dl / %dhData: high half of mul/div (%rdx:%rax); 3rd arg
%rsi%esi%si%silSource index for string ops; 2nd arg
%rdi%edi%di%dilDestination index for string ops; 1st arg
%rsp%esp%sp%splStack pointer: top of stack (push/pop/call/ret)
%rbp%ebp%bp%bplBase/frame pointer: anchors the stack frame; callee-saved
%r8–%r15%r8d–%r15d%r8w–%r15w%r8b–%r15bExtra general-purpose (x86-64 only); %r8, %r9 = 5th, 6th arg
%rip%eip%ip—Instruction pointer: next instruction; only changed by jumps/calls
rflagseflagsflags—Status flags: CF, ZF, SF, OF, PF (+ DF, IF, TF control bits)
Note: rbx sv rbp
  • rbx used to hold the base address of data structures for example, today no special purpose
  • rbp → stack frame “base pointer”

6.2 Instructions

byte, word, longword? doubleword?, quadword

AT&T Syntax!

lea instruction for (rds, rdi, k) for k = 1, 2, 4, 8

  • we can do mult by 3 with (rds, rds, 2) = rds + 2*rds

CF → unsigned overflow
OF → signed overflow (a > 0 && b > 0 && t < 0) || (a < 0 && b < 0 && t > 0)
→ TODO: check if this is right

you can set them with test → check explicitly, to check without actually computing

setX instructions → interpret flags into a reg to check some conditions (above, below, equal, etc..)